Irya Smart Network Interface Card

Overview

IRYA Smart NIC is built around Xilinx Virtex ultra-scale plus FPGA which offers upto 2586000 logic cells . The board is having a standard PCIe NIC form factor with two 100G QSFP28+ link which can be Interchangeably used for 25/40/50/100G Ethernet and one Gen3 x16 interface to host device. The board is designed in x16 low profile card form factor. We have successfully executed OvS(OpenvSwitch) and Cryptography(NetworkAccelerator) on the NIC card as the reference solutions and are part of IP Offering

Key Features

Xilinx Virtex Ultrascale+VU9P FPGA Board
Low-profile PCIe Network Processing FPGA Board Featuring 2 X 10/25/40/50/100G
Dual QSFP28 cages 40GbE/100GbE network solutions
PCIe Gen3 x 16
Half-Height Half-Length (HHHL) NIC
PCIe end points with16 lanes at 8Gb/s link rate(Gen3)
Tandem configuration mode available
Microcontroller for Sequencing
JTAG connector/USB to JTAG controller

Specifications	XCVU7P	XCVU9P	Advantage
FPGA Capability	CLB LUT-788K CLB Flip-Flops-1,576K DSP Slices-4,560 BRAM-50.6Mb URAM-180.0Mb	CLB LUT-1,182K CLB Flip-Flops-2,364K DSP Slices-6,840 BRAM-75.9Mb URAM-270.0Mb	Higher capacity FPGA
Form Factor	½ Length low profile x16 PCIe form Factor Width:167.65mm Height:68.89mm Depth:16.3mm	½ Length low profile x16 PCIe form Factor Width:167.65mm Height:68.89mm Depth:16.3mm	True PCIe half length half height low profile card form factor
PCIe interface	x16 Gen1, Gen2, Gen3 interface direct to FPGA	x16 Gen1, Gen2, Gen3 interface direct to FPGA
On Board Memory	DDR4 Memory, 2x banks of x72 (64 bit + 8 bit ECC). Total Capacity-8 GB, upgradable to 16 GB 2Gb QSPI NOR Flash for FPGA configuration	DDR4 Memory, 2x banks of x72( 64 bit + 8 bit ECC). Total Capacity-8 GB, upgradable to 16 GB 2Gb QSPI NOR Flash for FPGA configuration	Configurable memory options
QSFP Interface(s)	2x QSFP28 User Configurable, includes 10/ 25/ 40/ 50/ 100 G Ethernet	2x QSFP28 User Configurable, includes 10/ 25/ 40/ 50/ 100 G Ethernet	As Per Industry Standards
Other External Interface(s)	Micro USB for JTAG support (FPGA programming and debug) and access to BMC	Micro USB for JTAG support (FPGA programming and debug) and access to BMC	Single USB connector for programing FPGA and BMC
Graphical User Interface	GUI for the following functions monitoring the basic board parameters like Voltage, current, temperature Configuring clock for CMAC Accessing on board EEPROM Monitoring temperature alerts Firmware upgrades for BMC	GUI for the following functions monitoring the basic board parameters like Voltage, current, temperature Configuring clock for CMAC Accessing on board EEPROM Monitoring temperature alerts Firmware upgrades for BMC	User friendly Interface
Production Ready Design	Available	Available
Cooling	Active Cooling, Custom heat sink with fan	Active Cooling, Custom heat sink with fan	Better temperature handling capability
Temperature sensor	Available	Available	As Per Industry Standards
Board Management Controller	Power sequencing and reset Field upgrades FPGA configuration and control Clock configuration I2C bus access USB 2.0 Voltage overrides	Power sequencing and reset Field upgrades FPGA configuration and control Clock configuration I2C bus access USB 2.0 Voltage overrides	As Per Industry Standards
Operating Temperature	0°C to 55°C	0°C to 55°C	As Per Industry Standards
Clocking options	Low-Jitter, configurable clock ranging from 10MHz to 750 MHz	Low-Jitter, configurable clock ranging from 10MHz to 750 MHz	As Per Industry Standards

Financial computing
Datacenter applications
Network Acceleration

VVDN - IRYA
Smart Network Interface Card Block Diagram